Interpretation of FPGA design programmable filter system circuit

Filter 18.432M

With a single-chip microcomputer and programmable logic device (FPGA) as the control core, a program-controlled filter is designed to realize the functions of small-signal program-controlled amplification, program-controlled adjustment filter cutoff frequency and amplitude-frequency characteristic test. The amplification module is realized by the variable gain amplifier AD603, the maximum gain is 60dB, the 10dB step is adjustable, and the gain error is less than 1%. The programmable filter module consists of MAX297 low-pass filter, TLC1068 high-pass filter and elliptical low-pass filter. The filter mode is selected by analog switch. The system program-controlled adjusts the -3dB cutoff frequency of the active filter to make it adjustable from 1 to 30 kHz with an error of less than 1.5%. In addition, the amplitude of the swept signal is measured using the RMS sampling chip AD637 and the 12-bit parallel A/D converter MAX120.

A filter is a device used to eliminate interfering noise and can be used to effectively filter out frequencies at a particular frequency or frequencies outside of that frequency. It occupies a very important position in the electronics field and has been widely used in signal processing, anti-interference processing, power systems, and anti-aliasing processing. For the programmable filter, the biggest feature of the system is that its filtering mode can be selected by program control, and the -3 dB cutoff frequency is programmable, which is equivalent to a multi-function filter, which will have better application prospects. In addition, the system has the function of amplitude-frequency characteristic test, and displays the spectral characteristics through an oscilloscope, which can intuitively reflect the filtering effect.

Amplification module

The specific circuit of the amplification module is shown in Figure 2. The first part is a voltage divider network, in which the first four resistors attenuate the input signal by a factor of 100 and form a 51Ω impedance with the signal source internal resistance. The latter 51Ω is the matching resistor. The second part uses the OPA690 to amplify the small signal by a factor of two, while acting as an impedance transform and isolation. Since the input impedance of the AD603 is 100Ω, a 100 Ω resistor is connected in series to match. The third part is the AD603 variable gain amplifier, whose gain increases linearly in dB as the control voltage increases. The reference voltage of the 1 pin is obtained by the operation of the microcontroller and controlling the output voltage of the DAC chip, thereby achieving accurate numerical control. Gain G(dB)=40VG+G0, where VG is the differential input voltage, the range is -500~500mV; G0 is the gain start point, which is different when connected to different feedback networks. Indirectly, a 5kΩ potentiometer is changed in the 5th and 7th pins.

High-pass filter module

The LTC1068 is a low noise, high precision general purpose filter that, when used for high pass filtering, has a cutoff frequency range of 1 Hz to 50 kHz and no aliasing up to 200 times the cutoff frequency. Since the four channels of the LTC1068 are low-noise, high-precision, high-performance 2nd-order filters, low-pass, high-pass, band-pass, and band-stop filters can be implemented with only a few external resistors per channel. The specific circuit is shown in Figure 3. The B port Q value is 0.57, and the A port Q value is about 1. In the debugging of the circuit, it is found that the Q value of port A needs to be larger than the value of port B, otherwise the amplitude of the signal at the cutoff frequency will be up.

The LTC1068 has a clock frequency to passband ratio of 200:1. Since the LTC1068 internally doubles the clock signal CLK, when the cutoff frequency is at least 1 kHz, the internal clock frequency is actually 400kHz, so add a cutoff after the LTC1068. A low-pass filter with a frequency of 450 kHz filters out noise and higher harmonics in the sub-band.