The CS1237 is a high precision, low power analog to digital conversion chip with a differential input channel, built-in temperature sensor and high precision oscillator. The following is a functional block diagram of the CS1237 chip. 1) CS1237 is a high precision, low power analog to digital conversion chip, a differential input channel, built-in temperature sensor and high precision oscillator. 2) The PGA of CS1237 is optional: 1, 2, 64, 128, the default is 128. 3) CS1237 ADC data output rate in normal mode is optional: 10HZ, 40Hz\ 640Hz\ 1.28kHz, default is 10Hz; 4) The MCU can communicate with the CS1237 via the 2-wire SPI interface SCLK, DRDY DOUT, such as channel selection, PGA selection, and output rate selection. 1) Built-in crystal oscillator 2) Integrated temperature sensor 3) With Power down function 4) 2-wire SPI interface, the fastest rate is 1.1MHZ 24-bit no missing code PGA magnification options: 1, 2, 64, 128 1 channel 24-bit differential input without missing code, ENOB is 20 bits (5V)\19.5 bits (3.3V) when PGA=128 PP noise: PGA = 128, 10HZ: 180nV; INL is less than 0.0015% Output rate is optional: 10HZ, 40HZ, 640Hz, 1.28kHz In-band short function The CS1237 is a high precision, low power Sigma-Delta analog-to-digital converter with a Sigma-De1taADC, a differential input channel and a temperature sensor. The ADC uses a two-stage sigm a delta modulator to pass the low noise amplifier structure. Achieve PGA amplification, the magnification can be selected: 1, 2, 64, 128. At PGA=128, the effective resolution is up to 20 bits (working at 5V). The CS1237 has an internal RC oscillator that eliminates the need for an external crystal. The CS1237 can be configured with multiple functional modes via DRDY, DOUT and SCIK, for example for temperature sensing, PGA selection, ADC data output rate selection and more. The CS1237 has a Powerdown mode. All parameter tests are tested at ambient temperature -40 to 85 ° C with built-in reference unless otherwise noted. There is one ADC in the CS1237, which integrates one differential input. The signal input can be the differential input signal AINP, AINN, or the output signal of the temperature sensor. The switching of the input signal is controlled by the register (ch_se[1:0]). The basic structure is shown below: Figure 3 analog input structure diagram The CSGA of the CS1237 can be equipped with: 1, 2, 64, 128, controlled by the register (ga_sl[1:0]); The reference voltage can be either external or internal. If an external reference is to be used, turn off the internal first. The reference, internal reference control is controlled by the register (refo_off). The temperature measurement function is provided inside the chip. When ah_se1[1:0]=2'b10, the ADC analog signal input is connected to the internal temperature sensor, and the other analog input signals are invalid. The ADC derives the actual temperature value by measuring the voltage difference of the internal temperature sensor output. When ch_se[10]=2b10, the ADC only supports PGA=1. The temperature sensor requires a single point calibration. Correction method: At a certain temperature point A, use the temperature sensor to measure the code to get the code value Yao Then the temperature corresponding to other temperature point B = Yb+(273.15+A)Ya-273.15 The unit of A temperature is Celsius. Ya is the temperature code value corresponding to point A. Yb is the temperature code value corresponding to point B. The CS1237 provides a low noise, low drift PGA amplifier connected to the bridge sensor differential output. This structure is shown in the figure below. The front anti-EMI filter circuit R=4502, C=18pF realizes 20M high-frequency filtering. low The noise PGA amplifier is 64 times amplified by RF1; R1; RF2, and is composed of 64MHz and the post-stage switching capacitor PGA. 128 PGA amplification. Configure different PGAs such as 1\ 2, 64\ 128 by pga_sel[1:0]. When using PGA = 1, 2, the 64x low noise PGA amplifier is turned off to save power. When using a low noise PGA amplifier, the input range is between GND+0.75V and VDD_0.75V, beyond which this can cause actual performance degradation. Connect a built-in 45PF capacitor to the CAP port to form a low-pass filter with the built-in 2k resistor RINT for high-frequency filtering of the output signal of the low-noise PGA amplifier. The low-pass filter can also be used as an anti-aliasing filter for the ADC. Device. Figure 4 PGA structure diagram CS1237 has built-in Buffer. When PGA=1, 2, CS1237 uses Buffer to reduce the problems caused by low differential input impedance of the ADC, such as insufficient setup time, large gain error, etc. When PGA=64, 128, CS1237 also Use Buffer to reduce the setup error, gain error and internal code drift caused by low-pass filtering of low-noise PGA after RINT=2K and CNT=0.1uF. The CS1237 uses a built-in crystal to provide the clock frequency required by the system, typically 5.2MHZO When the chip is powered up, the built-in power-on reset circuit generates a reset signal that automatically resets the chip. When SCLK goes from low to high and stays high for more than 100us, CS1237 enters PowerDwon Mode, the power consumption is lower than 0.1UAO at this time. When SCLK returns to low level, the chip will re-enter normal operation. When the system is re-entered into the normal working mode by Power down, all the functions are configured in the state before PowerDown, and no function configuration is required. Design of electronic scale application based on CS1237 http://bbs.elecfans.com/forum.php?mod=viewthread&tid=927715&page=1 The Hydrogel Screen Protector is made of imported material with TPU as the base material and is combined with hydrogel. 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