PT62SCMD12 features: low jitter: 1ns typical; gate drive; overcurrent protection; dead time generator; undervoltage and overvoltage lockout
PT62SCMD12 reference design application circuit:
Figure 1PT62SCMD12 reference design
The driver has an on-board dead-time generator which overrules the input signals when the deadtime of the applied PWM signals (tDEAD, IN) becomes larger than the set dead-time (tDEAD, PROG). Note that when the dead-time Generator has to intervene, the jitter increases to a maximum of 10ns.
PT62SCMD12 Chinese data sheet: Click to download
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